With the continuous development of ultra-large integration (ULI), the critical dimension (CD) of semiconductor devices has become smaller and smaller. Further, the functionalities of the semiconductor devices have also become broader and broader. The integration level of integrate circuits (ICs) has been developed into a sale where hundreds of millions, or a few billions of devices are integrated in one chip. At the same time, multilayer interconnect techniques utilizing more than two layers of metal interconnect structures have been widely used.
The conventional interconnect structures are usually made of aluminum. With the continuous dimension-shrinking of the semiconductor devices, although the size of interconnect structures is continuously reduced, the electric current passing through the interconnect structures has become larger and larger. Further, the responding time of the interconnect structures are required to be shorter and shorter. Thus, the conventional aluminum interconnect structures are unable to match the desired requirements. Therefore, copper has gradually substituted aluminum in the interconnect structures. Comparing with aluminum, copper has a lower resistivity, and a better anti-electromigration performance. Thus, copper interconnect structures are able to lower the resistance-capacitance (RC) delay of the interconnect structures; improve the anti-electromigration ability; and enhance the reliability of the ICs. Therefore, substituting the aluminum interconnect structures with the copper interconnect structures has become a trend for developmental of the interconnect technology of ICs.
However, as the CMOS devices are scaled to a technical node smaller than 14 nm, the RC delay has attracted more attentions. The resistance in the RC delay significantly depends on the crystal grain size and inherent resistances of the copper interconnect structures. When the critical dimension of the copper interconnect structure is substantially small, the size effects, including the surface and grain boundary scatterings, are expected to dramatically increase the effective resistivity of copper (Cu) interconnects. Moreover, diffusion barriers in the interconnect structure, which are very poor conductors, will take an ever-increasing fraction of the wire volume. Thus, it may increase the resistance of the copper interconnect structures.
Further, the production cost of the copper interconnect structures formed by the existing fabrication processes may be relatively high. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.